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________is the only non-maskable interrupt in 8085 microprocessor.
TRAP
RST 6.5
INTR
RST 7
TRAP
TRAP is the only non-maskable interrupt (NMI) in the 8085 microprocessor. It cannot be disabled or ignored by the program and is used for critical tasks such as power failure or emergency shutdowns.
TRAP is the only non-maskable interrupt (NMI) in the 8085 microprocessor. It cannot be disabled or ignored by the program and is used for critical tasks such as power failure or emergency shutdowns.
VtrapтАЛ=High┬аLevel┬аtransition тАФ The logic level requirement for TRAP triggering
The TRAP interrupt is both edge and level triggered, meaning it requires a high level and a transition to stay active to be recognized. Being non-maskable, it bypasses the Interrupt Enable (INTE) flag and the mask settings of the SIM (Set Interrupt Mask) instruction, providing the highest priority among all hardware interrupts.
TRAP has the highest priority of all hardware interrupts in 8085.
It is both level and edge sensitive.
It cannot be masked by the SIM instruction.
Vector address of TRAP is 0024H.
Ensures critical routines are executed immediately regardless of current status.
Useful for emergency power-down procedures.
Cannot be software-disabled, which may lead to conflicts if not managed correctly.
Emergency Power Failure Detection
Hardware Error Trapping
Real-time System Resets
RST 7.5, 6.5, and 5.5 are maskable interrupts and can be enabled/disabled using the EI/DI instructions and the SIM instruction.
INTR is the only non-vectored interrupt in 8085, requiring an external device to provide the interrupt vector/call instruction.
A is correct тАФ TRAP is the only non-maskable interrupt in the 8085 microprocessor, ensuring execution regardless of the mask state.
Always remember the priority order for 8085 interrupts: TRAP > RST 7.5 > RST 6.5 > RST 5.5 > INTR.